Distinguished Lectures Series
The ECE Distinguished Lectures Series brings world-class researchers to the University to share their research and discoveries.
The Light at the End of the CMOS Tunnel
In spite of numerous predictions to the contrary, Silicon technology is marching along past the 22nm node and on to ever finer dimensions. Innovations at the technology, device, circuit and system levels continue to enable us to scale in spite of what sometime appear to be insurmountable problems in power, lack of performance, manufacturability and so on. To a large degree, these innovations are necessary because no substitute technology has been found as yet and, in fact, it does not appear likely that any such technology will become practical this decade. This leaves us with the need to anticipate and predict the near and medium term futures of CMOS for the next handful of technology nodes. This talk will focus on doing just that, and will show how an important new constraint on future system scaling is circuit resilience.
Resilience is the ability of circuits to operate in spite of challenges like noise, difficult environmental conditions, aging and manufacturing imperfections. These factors conspire to cause transient or permanent errors that are indistinguishable from traditional “hard” faults typically caused by defects during fabrication. Without significant innovation at the circuit and system levels, the probability of these events can rise quite dramatically. In the area of SRAM, such phenomena have existed for the last three or four technology nodes, but significant investments in this area have indeed allowed continued system level scaling with ever larger on-chip memories. As these same phenomena start attacking integrated circuits more pervasively, there is an urgent need for research and development in this area to avert the problems certain to arise with increased defect rates.
To motivate such research, we will present a roadmap for predicting the resilience of CMOS circuits down to the 12nm node, and show examples of how innovations at the circuit and system levels can indeed be used to prolong the life of CMOS, and allow for system level operation in spite of frequent device level defects.
Efficient Light and Solar Energy Generation Through Nanoscale Control of Organic Materials
Stephen R. Forrest
In this talk we will look at several promising approaches to creating nanoscale morphology in small molecular weight thin films. Moving from the conventional vacuum deposited CuPc/C60 based system, we will examine a number of different routes to creating nanostructures based on new materials such as squaraines, carbon nanotubes and subphtalocyanine. Combinations of solution and vapor phase growth will be discussed. Routes to demonstrating very high efficiency single junction and tandem architectures with these materials and growth combinations are considered. In addition, we will consider how morphological control can also be used to generate high efficiency light emission from organic coherent emitters.
Addressing the General Purpose Processor Dilemma with Reconfigurable Logic Computing
Joel S. Emer
The historical improvements in the performance of general-purpose processors have long provided opportunities for application innovation. Word processing, spreadsheets, desktop publishing, networking and various game genres are just some of the many applications that have arisen because of the increasing capabilities and the versatility of general-purpose processors. Key to these innovations is the fact that general-purpose processors do not predefine the applications that they are going to run.
Currently, the capabilities of individual general-purpose processors are encountering challenges, such as diminishing returns in exploiting instruction-level parallelism and power limits. As a consequence, a variety of approaches are being employed to address this situation, including adding myriad dedicated accelerators. Unfortunately, while this improves performance it sacrifices generality. More specifically, the time, difficulty and cost of special purpose design preclude dedicated logic from serving as a viable avenue for application innovation.
There recently has been progress in addressing this dilemma between providing programmability and higher performance via an interesting middle ground between fully general-purpose computing and dedicated logic. In specific, reconfigurable logic, typically in the form of FPGAs, addresses many of the cost-related liabilities of dedicated logic and is increasingly being applied to general computation problems.
In this talk, we will examine the possibilities for reconfigurable logic as an ingredient of general-purpose computation. We will look at its potential and attempt to provide an analogy between the state of reconfigurable logic computing today and the early days of conventional computing. In that light, we consider how reconfigurable logic might recapitulate the history of general-purpose computation by looking at how it can fit into the architectural framework that we have generally reserved for conventional processors, how it can be more seamlessly be incorporated into a system and how reconfigurable logic might be made more efficient and be more effectively programmed by looking at the semantic gap between programming languages and the compute fabric itself.
Video conferencing is now ubiquitous, enabled for example by Skype and iChat. Yet we continue to travel great distances to gather in person. Why? We argue that today’s systems fall far short of providing the sense of effortless connectedness of a face-to-face meeting: They fail to be immersive. Immersive communication has sparked popular imagination for many years, witnessed for example by Star Wars’ holographic Jedi council meetings and The Matrix. In this presentation we review the history of immersive communication and describe attributes needed to achieve a sense immersion. We further describe technical advances that lie on road to immersive communication, including lightfield displays, 3D depth sensors, and multichannel audio. Some of these improvements are within our grasp while others will require enormous advances in multimedia signal processing, computation, and our understanding of human perception, all of which remain rich and active areas of research.
Electronic & magnetic systems & devices
Recycling Circuit and Interconnect Numerical Techniques for Biology
Decades of competitive development, along with a large user community, have resulted in circuit and interconnect analysis tools with heavily optimized numerical algorithms. The computational tools for biology are far less mature, so it seems natural to look for opportunities to borrow techniques. In this talk we will examine several biological applications, and show that while each appears to be an ideal opportunity to recycle a circuit- or interconnect-related numerical techniques, subtleties arise. We will start by considering mass-action kinetics (MAK) models of biochemical oscillators, and show that techniques for computing circuit oscillator parametric sensitivities often fail when applied to MAK, but can patched. Our second example, associated with drug design, is bio-molecular electrostatic analysis. The bio-molecular problem has many similarities to capacitance extraction, but differences in geometry and physics lead to far different optimal numerical strategies. As our last example, we will examine model reduction methods applied to simulating entire cardiovascular systems, a case where borrowing techniques has proved to be an unequivocal success. This talk describes work done in collaboration with J. Toettcher, B. Bond, S. Kuo, T. El-Moselhy, B. TIdor, and L. Daniel.