Anantha P. Chandrakasan

Title:  Next-generation Ultra-Low-Power System Design
Date:  April 7, 2011 at 3 p.m. in SF1105

Abstract:  Next-generation handheld devices and wireless sensors for health and environmental monitoring, will require dramatic reduction in energy consumption. The ultimate goal is to power these devices using energy-harvesting techniques such as vibration-to-electric conversion, or through body heat. A system-level approach must be used to optimize such devices. Relevant considerations include ultra-low-voltage digital circuit operation, application-specific digital and mixed-signal architectures, extreme parallelism, computation vs. communication trade-off, and integrated energy-processing circuits. The use of analog-assisted digital circuits (such as embedded switched-capacitor power management, and offset compensation in sense amplifiers) will be critical in dealing with device variability and low-voltage operation. Efficient energy-processing circuits (for generation, buffering, and conversion) is critical in many applications. Several system examples will be shown, covering portable biomedical and multimedia devices.

Bio:  Anantha P. Chandrakasan received the B.S, M.S. and Ph.D. degrees in Electrical Engineering and Computer Sciences from the University of California, Berkeley, in 1989, 1990, and 1994 respectively. Since September 1994, he has been with the Massachusetts Institute of Technology, Cambridge, where he is currently the Joseph F. and Nancy P. Keithley Professor of Electrical Engineering.

He has been the co-recipient of several awards including the 1993 IEEE Communications Society Best Tutorial Paper Award, the IEEE Electron Devices Society 1997 Paul Rappaport Award for the Best Paper in an EDS publication during 1997, the 1999 DAC Design Contest Award, the 2004 DAC/ISSCC Student-Design-Contest Award, the 2007 IEEE ISSCC Beatrice Winner Award for Editorial Excellence, and the IEEE ISSCC Jack Kilby Award for Outstanding Student Paper (2007, 2008, 2009). He received the 2009 Semiconductor Industry Association (SIA) University Researcher Award.

His research interests include low-power digital integrated-circuit design, wireless microsensors, ultra-wideband radios, and emerging technologies. He is a co-author of Low Power Digital CMOS Design (Kluwer Academic Publishers, 1995), Digital Integrated Circuits (Pearson Prentice-Hall, 2003, 2nd edition), and Sub-threshold Design for Ultra-Low Power Systems (Springer 2006). He is also a co-editor of Low Power CMOS Design (IEEE Press, 1998), Design of High-Performance Microprocessor Circuits (IEEE Press, 2000), and Leakage in Nanometer CMOS Technologies (Springer, 2005).

He has served as the Technical Program Co-Chair for the 1997 International Symposium on Low-Power Electronics and Design (ISLPED), 1998 VLSI Design, and the 1998 IEEE Workshop on Signal-Processing Systems. He was the Signal_Processing Sub-Committee Chair for ISSCC 1999-2001, the Program Vice-Chair for ISSCC 2002, the Program Chair for ISSCC 2003, the Technology-Directions Sub-Committee Chair for ISSCC 2004-2009, and the Conference Chair for ISSCC 2010 and 2011. He was an Associate Editor for the IEEE Journal of Solid-State Circuits from 1998 to 2001. He served on SSCS AdCom from 2000 to 2007; and he was the Meetings Committee Chair from 2004 to 2007. He is the Director of the MIT Microystems Technology Laboratories (MTL) which has over 700 users.